Franco Fummi received the Laurea degree in Electronic Engineering at Politecnico di Milano in 1990 and the Ph.D.in Electronics and Communication Engineering in 1994 at Politecnico di Milano. In 1993 he was Research Assistant at the Department of Computer Science of the University of Victoria (B.C.). In 1996 he obtained the position of Assistant Professor in Computer Science at the Dipartimento di Elettronica e Informazione of Politecnico di Milano where he remained until October 1998. In July 1998 he obtained the position of Associate Professor in Computer Architecture at the Computer Science Department of Università di Verona. Since March 2001 he is Full Professor in Computer Architecture at the Computer Science Department of Università di Verona He is leading the Cyber-physical and IoT Systems Design (CISD) group of the Università di Verona, currently composed of more than 20 people and working on hardware description languages and electronic design automation methodologies for modeling, verification, testing and optimization of cyber-physical systems. The main research directions exploited by Franco Fummi are • Embedded system verification (Static verification - Dynamic verification- Semi-formal verification - Hybrid and real-time systems – Smart systems integration); Dipartimento di Informatica Strada le Grazie 15 - 37134 | T +39 045 802 7071-7069 (Click to show email) P. IVA 01541040232 | C.F. 93009870234 • Networked embedded systems (System/Network co-simulation - System/Network codesign - QoS-enabled design - Sensor networks and M2M systems); • Embedded systems design (TLM-RTL synthesis and abstraction - RTL-to-SW abstraction - TLM transactor generation - Device-driver generation - Embedded SW for multi/many-core systems - Middleware-based design). • Cyber-physical production systems modeling, design, and simulation. In relation to such research areas, he published more than 320 papers; three of them received the "best paper award" respectively at IEEE EURODAC'96, IEEE DATE'99 and IEEE FDL'11. He is co-founder and CTO of the EDA company EDALab (www.edalab.it), a spin-off of the Università di Verona, focused on networked embedded systems design and tools. He has been partner in ten IST European projects: FP5-IST-2001-34607 (SYMBAD), FP6-2005- IST-5-033506 (VERTIGO), FP6-2005-IST-5-033709 (ANGEL), FP7-REGPOT-2008-1 (CREDES), FP7-2007-IST-4-247999 (COMPLEX), FP7-ICT-2011-7-288827 (SMAC), FP7-ICT-2011-7-288166 (TOUCHMORE), FP7-ICT-2013-10-611146 (CONTREX), and he coordinated the FP7-2007-IST-1- 217069 (COCONUT) and H2020-MSCA-IF-2019-894237 (DEFACTO) projects. From 2012 to 2018 is has been the head of the Department of Computer Science at the Università di Verona, that has been selected by the Italian Ministry of Education, Universities and Research (MIUR) in the 180 "Dipartimenti di Eccellenza 2018-2022" (Departments of Excellence). Under this framework, he is leading the project Computer Engineering for Industry 4.0 (https://www.icelab.di.univr.it/) which is focusing to industrial computer engineering the researches of the entire Department of Computer Science.